Peak detection of any time serial signals can be done using different methods. However, exact positions of the peaks cannot be achieved, if the method does not have a high sensitivity detection capability. It is known that various errors appear between the real peak value and the measured value; therefore, a true peak value can be obtained from the measured value by using a highly sensitive detection method. For this reason, spline interpolation is used to estimate the peak points from measured values. In this paper, highly sensitive peak detection of high-frequency signals based on FPGA is proposed using spline algorithm, which is capable of calculating the middle points using the first and last points on the signal. To evaluate the system, the histograms, the mean, and the variance of the peak values before and after spline interpolation are compared. Simulation results show that calculated peak points using splines and real peak values of a signal are very close to each other since the spline algorithm has very high calculation sensitivity. In addition, spline results show us how much error the existing peak values have. Index Terms--spline, architecture, field programmable gate arrays, peak, detection.