Realtime implementation of neural network augmented fault tolerant flight controllers for an advanced fighter aircraft on a target digital signal processor

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Date: Aug. 2008
Publisher: Research India Publications
Document Type: Report
Length: 3,152 words
Lexile Measure: 1320L

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Abstract :

This paper is focused on a research effort undertaken for demonstrating the capabilities of hardware based on-line learning neural networks scheme developed for enhancement of fault-tolerant capabilities of a conventional flight control system. The same has been implemented for a high performance fighter aircraft model [1] during auto-landing [2], when it is subjected to various failure scenarios and severe winds. Two such fault tolerant flight control schemes have been implemented by embedding them on a Digital Signal Processor (DSP) motherboard TMS6713. The first scheme is the classical flight controller known as the Baseline Trajectory following Controller popularly known as BTFC [3], while the second scheme is based on a neural controller architecture popularly known as Extended Minimum Resource Allocation Network (EMRAN) [4]. Both the schemes provide for actuator failure detection, identification and accommodation (AFDIA) for different surface actuator failures. Emphasis has been placed to ensure real-time capabilities as well as an efficient hardware implementation of the schemes without degradation of performance in terms of reduction in fault tolerance envelope and such other processor specific precision problems. The results of the simulation following different types of failures are reported. Keywords: Fault tolerant flight controllers, neural networks, BTFC, EMRAN, DSP, Autolanding, Fault Tolerance Envelope, Longitudinal dynamics, Lateral dynamics

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Source Citation   

Gale Document Number: GALE|A216041257